1. Field of the Invention
The present invention is in the field of semiconductor circuit devices. More particularly, the present invention relates to a package for a semiconductor circuit chip, which package by its configuration greatly assists to protect the semiconductor circuit on the chip and within the package from the damaging effects of electrostatic discharge.
2. Related Technology
Semiconductor circuit devices are generally formed on a substrate of material, such as silicon, capable of forming a semiconductor material when doped with certain impurities. These semiconductor circuit devices normally include a number of structural circuit features of exceedingly small-scale. Typically these small scale circuit features are formed with the use of conventional photolithographic techniques, including use of photo resists, etching, and such techniques as vapor-phase deposition, and electron beam epitaxy, to form circuit element configurations of microscopic scale.
Such circuits are generally formed in groups on a large segment of the substrate material, and then are separated into individual Circuits and subsequently packaged. The individual semiconductor circuit devices are generally referred to as "chips". These circuit device chips are typically packaged in combination packages which include plastic, metal and perhaps ceramic component parts, and which provide environmental protection for the semiconductor circuit, as well as providing for electrical connection of the semiconductor circuit with other electrical circuitry outside of the package.
Common semiconductor package configurations include the dual-in-line-package (DIP), which includes two rows of electrical contacts along opposite edges of the package. Also, a popular package configuration is the quad package, which is square or rectangular and has electrical contacts for the integrated circuit along each of its four edges. Another configuration of package includes plural electrical contact pins in a rectangular array which substantially covers the lower surface of the package.
The operating voltages for these semiconductor circuit devices at the levels of the small-scale structural circuit features is generally only a few volts. Accordingly, these devices are typically susceptible to damage or destruction if exposed to sufficiently large electrostatic discharges. In fact, the level of electrostatic charge which a person can accumulate on their body, for example on a day of low humidity, and from merely walking across a carpet of synthetic fibers is sufficient to badly damage or destroy many semiconductor devices, if this electrostatic charge is discharged into the device. In fact, the sensitivity of some semiconductor circuit devices to damage from electrostatic discharge is such that a person who is carrying an electrostatic charge on their body and who handles such a device may not even notice the discharge from their body into the device. However, the semiconductor circuit device may still be damaged beyond use by such an unnoticed electrostatic discharge.
Accordingly, safe handling practices have been developed for use in association with semiconductor circuit devices. These practices include such precautions as using grounded tools, grounding a worker's body, and using grounded conductive mats on work bench tops and floors. In addition to the development of safe handling practices and procedures for observance in connection with semiconductor circuit devices, electrostatic discharge protection (edp) circuitry has been developed which is embedded in the devices themselves. However, safe handling practices and procedures are not always followed, and the embedded electrostatic discharge protection circuitry is then called upon to protect a circuit from damage or destruction from an inadvertent electrostatic discharge.
Unavoidably, conventional embedded electrostatic discharge protection circuitry preempts valuable space on a semiconductor circuit chip. In addition to taking valuable area on the surface of the semiconductor chip, such conventional electrostatic discharge protection circuitry is itself of limited effectiveness. That is, the semiconductor circuit may not be effectively protected fully from the damaging effects of an electrostatic discharge.
A conventional structure for protecting delicate circuit elements that have already been mounted on a printed circuit board is seen in U.S. Pat. No. 5,029,041, (hereinafter, the '041 patent) issued 2 Jul. 1991, to R. C. Robinson, et al. The '041 patent concerns the provision of a peripheral circuit path, connected to a reference potential point, which is provided with plural outwardly disposed pointed protrusions. These protrusions point toward the direction of anticipated electrostatic discharge. In effect, the teaching of the '041 patent is an adaptation of the old concept inherent in the technique of providing lightning rods on the roof of a barn. Such lightning rods are provided with an earth (reference potential) connection to which it is hoped that the current surge from lightning (a large scale electrostatic discharge) will be drained.
However, the concept of the '041 patent is seen to have only limited or no applicability to the protection of integrated circuits that have not yet been installed in a printed circuit board. The integrated circuits in such a context are at greatest risk when they are being handled for insertion into or removal from a circuit board. Under these conditions, a grounded current drain (point of reference potential) is not available at the integrated circuit. To avoid electrostatic discharge induced damage or destruction to integrated circuit chips that have not yet been inserted in a printed circuit board it is typically necessary to employ the grounded tools, grounded conductive mats on work benches and the other cumbersome conventional safe handling practices for semiconductor circuit devices discussed above.
Moreover, when such safe handling practices are not followed, and the circuit device is being handled, the integrated circuit is at a floating potential with respect to ground, and is isolated from ground, so that the current surge from an electrostatic discharge into the circuit damages the circuit elements as it flows to the floating potential voltage level of the circuit. By analogy, this current flow to the integrated circuit might be visualized as the charging of a capacitor which is isolated at its contacts so that it is at a floating potential. In such a situation, an electrostatic discharge can flow into the capacitor and be distributed as charge on the plates of the capacitor. When such an electrostatic discharge current flows into an isolated integrated circuit, the voltage and current flow levels are too often such that they damage circuit components as they are distributed within the circuit.